AMD fusion processors in 2011
It’s been a long time in the making but AMD is finally set to release the first in its range of “Fusion” processors.
There was much talk of a hybrid central and graphics processing unit (CPU/GPU) since AMD’s merger with ATI in late 2006. AMD changed its tagline to “The Future is Fusion” in 2008.
AMD demonstrated its first fusion of central and graphics processing units (GPU/CPU) at the Computex trade show in June this year where they called it an Accelerated Graphics Processor (APU).
Chekib Akrout, Senior Vice President of the Technology Group at AMD confirmed during a conference call on Friday (20 August) that we should start seeing notebooks and netbooks using the first APUs, codenamed “Ontario,” in early 2011.
Jaco Laubscher, AMD South Africa’s channel sales manager for CPU, GPU and Chipset, says that AMD SA are expecting to go to market with the Ontario APUs in the first half of 2011.
“Bobcat” x86 Core
The CPU used in the “Ontario” will be based on AMD’s new “Bobcat” CPU core.
AMD said that not only is the “Bobcat” capable of running below one Watt of power, but that they estimate (based on their own models and simulations) that it can achieve 90% of today’s mainstream performance in less than half the silicon area.
According to AMD the “Bobcat” is able to run below 1W because it can operate at a range of voltages and frequencies for particular workloads. Smaller workloads can be executed at lower frequencies and voltages which translates to less power.
On the question of battery life Greg Hoeppner, Corporate Vice President of Design Engineering at AMD, said that it would be product specific, but that improvements in battery life could be expected.
AMD said that the “Bobcat” technology could be extrapolated to televisions and mobile phones, but that they were currently targeting the netbook and notebook markets.
“Bulldozer”
AMD also discussed their new high-end processor core codenamed “Bulldozer.”
To set the tone for the decisions behind the processor’s architecture, Akrout spoke about how there are essentially two approaches to deal with the current processor speed ceiling: Simultaneous multithreading (SMT) and chip-level multiprocessing (CMP).
“Bulldozer” uses something slightly different, said AMD.
One “Bulldozer” module shares single fetch, decode and floating point units but has two integer schedulers each with its own L1 cache. According to AMD this helps reduce power consumption and die space, which in turn reduces cost.
The integer schedulers are Arithmetic Logic Units (ALUs) as well as address generation units. According to AMD the floating point scheduler is capable of two simultaneous multiply accumulates using 128 bit floating point numbers.
Each chip is to be composed of multiple modules with each module seen as two cores. According to AMD module divisions are transparent to the shared hardware such as L3 cache, operating system and applications.
“Bulldozer” will be used in client and server designs in 2011, according to AMD, but it will make its debut as a server CPU, not an APU. AMD said that “Bulldozer” would appear in APU products eventually, however.
When asked, AMD said that the new architecture was unlikely to be backwards compatible with current AMD CPU sockets, meaning that upgrading to the new core would mean a mainboard upgrade too.
Bobcat and Bulldozer << Is the future fusion?
Loading ...