IBM has developed a 5nm semiconductor manufacturing process which uses a new transistor design.
The manufacturing process uses a gate-all-round transistor design instead of the FinFET structure implemented in modern chips.
The transistor design consists of a trio of silicon nanosheets wrapped around a gate material, and promises better scaling at lower process nodes than FinFET transistors.
“Compared to the leading edge 10nm technology available in the market, a nanosheet-based 5nm technology can deliver 40% performance enhancement at fixed power, or 75% power savings at matched performance,” said IBM.
The company said the power savings conferred by its 5nm chip design could allow smartphones to last up to three-times longer on a single charge.