AMD's Barcelona

[ShockG]

There isn't anything wrong with Socket AM2. The reason there's no performance gain is because the Athlon64 that we have with us (K8) is 3/4years old. No memory controller can change that... You'll see it come to life with Barcelona.

 

[Brawler]

Not another AMD vs INTEL de-rail.

Each has had their fair share of glory, before c2d the athlon64/X2 was tops no doubt about that the pentium4/D really was crap.

Right now the C2D is the cpu to have, it will shift back to AMD, then Intel & so forth

 

[ShockG]

Brawler this is about sockets, not performance. The only only one debating performance is you... :/

 

[Abe]

From what I've heard, the Barcelona will work on AM2 and AM3. AM3 has also been touted as a multifunction socket. ie. Down the line, one would be able to put a GPU, Physics and Quad CPU in 4 socket board and still have a socket left over.

 

[Brawler]

Brawler this is about sockets, not performance. The only only one debating performance is you... :/

orly? read earlier posts, i wasn't referring to your posts :/

 

[DragonLogos]

The D2s are not all that they are made out to be, they have a 100% bigger cache than AMD (good for benchmarks, but hide real performance) which BTW cost a lot to put in, as can been seen in the Extreme editions which have a 4 meg cache, the darling of benchmarks

If you really want to see just how good the CPU really is, turn off the cache in the BIOS and then do your benching, hardware sites know about this, but its far more fun playing with the punters

 

[ShockG]

Um no... That's far from the truth

The large cache on the Core2's the latency involved fetches from an off-die memory controller. AMD's cache doesn't need to be that big because termination is on-die. If there's a cache miss on an AMD CPU it isn't as expensive as on a CPU with a controller on the NB. Also the Core2 can share data and use the large cache as scratch almost while on the AMD system each L2 cache is exclusive and no writing to the other core is possible (K8) but reading is (only through HT though, which is still slower than the direct access offered by the 4MB of the shared cache on the Core2)

Now, the Pentium4 D's also used the 4MB cache that, but in their case the penalty for predicting the wrong branch was massive because of the 30+ stage pipeline.

Core2 is superior in IPC count than any K8 not because of cache, but wider issuing better branch predictors etc... If you read the link provided in the 1st post you'll see that allot more has gone into Barcelona (so it can beat Core2) than the addition of a level3 cache. In fact Level2 cache stays the same with K10.

 

[DragonLogos]

Let me guess, you have not done any bench marks with cache turned off on AMD and Intel - Intel have pulled the Extreme trick once too often, ie loading a CPU with a large cache to make it look good for benching, when all it is doing is putting things on hold and claiming it has answered calls, no wonder they appear to be the Telkom of CPUs, and no wonder why Telkom like doing business with them, in fact, I do not think that Telkom sold any AMD based systems with their internet bundled deals... devil looks after its own and all... and all

Yes it is not all down to this, and yes there has been the pipeline issue that has dogged Intel, and also their crabby memory addressing (still a problem) what of their plans of building a 10 gig CPU (how they did not get done for vapour ware alludes me)

What else, how about how Intel side stepped the whole 64 bit thing and dual core, even MS were left wondering how things were going to go forward addressing 3.5 gigs of RAM... No wonder Vista got thrown together so badly, doomed to go the way of ME if you ask me... The answer to it all should be called, Windows Vision

 

[ShockG]

DragonLogos do you by any chance live within te same universe as the rest of us?

But seriously you have been misinformed.
1. Core2 Extreme X6800 has 4MB L2 Cache and 64Kb L1 cache for each core, so does the E6700 and E6600, so cache is not what makes the Intel's faster.
2. Core 2 Duo E6400 and E6300 only have 2MB L2 Cache like AMD Athlon64 FX60/62/70/72/74) yet they are faster for the same clock speed.

3.I don't know what Telkom has to do with Intel. Either way Intel has the market share and are by far bigger than AMD. If didn't know Intel is the biggest semiconductor firm in the world and in the top 50 biggest companies in the world while AMD is #300 or so.
hey have always had the market share, mainly because they spawned X86 architecture/instruction sets. AMD paid licensing to make X86 chips to Intel years ago...

Yes it is not all down to this, and yes there has been the pipeline issue that has dogged Intel, and also their crabby memory addressing (still a problem) what of their plans of building a 10 gig CPU (how they did not get done for vapour ware alludes me)

a) Their memory addressing was never a problem AMD used off-die controller since the company started and only changed to internal controller with Athlon64 in 2003. Even then the memory bandwidth efficiency sucked and only with dual channel controller did the benefits start to show when using DDR1.

b) AMD has only recently passed the 3GHz mark, while Intel achieved this in 2002/2003. Frequency is tied process and design. With a 90nm or even 32nm node it became apparent that 10GHz was not feasible unless something drastic took place that would change silicon/copper.

and last, clock speed comes secondary to IPC.

What else, how about how Intel side stepped the whole 64 bit thing and dual core, even MS were left wondering how things were going to go forward addressing 3.5 gigs of RAM... No wonder Vista got thrown together so badly, doomed to go the way of ME if you ask me... The answer to it all should be called, Windows Vision

How is Vista in anyway, shape or form related to Intel?

 

[Vampir0]

I'm so going to upgrade for this! AMD FTW!!!

This was long over due. Windows Vista is hurting my AMD 3800+ Dual Core...time for an upgrade

 

[Gnome]

i just dont understand why amd went over to am2, its slightly better and runs hotterand it chows more enrgy but i suppose they had to make the move to ddr 2 at some point

AMD FTL

You're obviously misinformed the AM2 architecture runs at a lower manufacturing process, thus it's cooler and the uses DDR2 ram that I don't even need to point out uses far less power than DDR ram. Therefore the total TDP has been reduced and there is even the EESFF CPU's such as the Athlon 64 X2 3800+ which has a TDP of 35w far less than the C2D 65w TDP.

AMD paid licensing to make X86 chips to Intel years ago...

Incorrect they manufactured chips for Intel on contract, only later they became a fully fledged processor maker (from the K5 onward).

a) Their memory addressing was never a problem AMD used off-die controller since the company started and only changed to internal controller with Athlon64 in 2003. Even then the memory bandwidth efficiency sucked and only with dual channel controller did the benefits start to show when using DDR1.

Where on earth did you get this information? The first CPU to support DDR memory was the AMD Athlon's way back when and they destroyed the Pentium 3 CPU as well as the first Pentium 4(Willamette core) Cpu's, the memory bandwidth alone was far less on the Pentium 3 architecture than on the Athlons. Then they moved to a internal memory controller that far out performes even the Intel C2D(vs. AM2) in memory through output.

b) AMD has only recently passed the 3GHz mark, while Intel achieved this in 2002/2003. Frequency is tied process and design. With a 90nm or even 32nm node it became apparent that 10GHz was not feasible unless something drastic took place that would change silicon/copper.

If you understood how a processor works you would know that manufacturing process isn't nearly as important as design where clock frequency was concerned. The Pentium 4 architecture uses a VERY deep pipeline in order to achieve those high frequencies which is why the C2D runs at far lower clock frequencies, because they chose (wisely) to move back to shorter pipelines.

It's a intricate process how it works but long pipeline present many problems and require heavily accurate branch prediction or else suffer from pipeline errors and thus flushes which result in severe performance hits (and efficiency drops) in order of magnitude because of the longer pipeline. Branch prediction currently can only be so accurate and thus presented a huge problem for the Pentium 4 architecture, and subsequently the long pipeline's where dropped.

 

[ShockG]

Ha Ha Gnome slow down before you hurt yourself...

You're obviously misinformed the AM2 architecture runs at a lower manufacturing process, thus it's cooler and the uses DDR2 ram that I don't even need to point out uses far less power than DDR ram. Therefore the total TDP has been reduced and there is even the EESFF CPU's such as the Athlon 64 X2 3800+ which has a TDP of 35w far less than the C2D 65w TDP.

1. Do not correct someone then turn around and make even more errors.
Majority of AM2 CPU's are 90nm just like 939 CPU's have been since Winchester in 2005. There was no node shift to AM2.

2. DDR voltage has nothing to do with the CPU. JEDEC made DDR2 reference voltage 1.8V compared to the 2.5 *later ratified to 2.6V* of DDR1.

3. The TDP of the 939 and AM2 parts is the same mainly 95W and 65W.

4. X2 3800+ like the others come in the EE version and the regular version. the 35WTDP and the other 65W models

Incorrect they manufactured chips for Intel on contract, only later they became a fully fledged processor maker (from the K5 onward).

Careful now you have to crawl before you attempt running...
AMD never manufactured CPUs for Intel at any point.
AMD amongst others which were perhaps before your day such NextGen, CyriX and Fairchild produced X86 clones. The CyriX parts going by the name of 4X86 and the like. Incidentally the highest clocked DX4 chip came from CyriX at 133MHz, followed by AMD's part at 120MHz and Intel's own DX4 75MHz and 100MHz chips. - Just a bit of history for you...

Where on earth did you get this information? The first CPU to support DDR memory was the AMD Athlon's way back when and they destroyed the Pentium 3 CPU as well as the first Pentium 4(Willamette core) Cpu's, the memory bandwidth alone was far less on the Pentium 3 architecture than on the Athlons. Then they moved to a internal memory controller that far out performes even the Intel C2D(vs. AM2) in memory through output.

Now now little one. Don't be brash, hush a little, observe a little, get a clue then try post just a little... no?

1. Athlon 'C' which came in SlotA cartridge made use of SDRAM, but the bus was double pumped for a then impressive 200MHZ FSB (100MHz SDR)

2. I am talking about memory addressing, not memory types, there's a vast difference there. The two are unrelated in this context...

3. As for memory bandwidth, AMD had inherently low memory bandwidth efficiency with the AthlonXP in particular. With the introduction of the nForce chipset and Dual Channel memory controllers in 2001. The theoratical 6.4GB/sec rarely ever got above 3.21GB/sec. At the time the Pentium 4B and C were above the 4GB/sec mark. While both used DDR1.

With the introduction of Athlon64 754 single channel chips. The memory bandwidth was still rather low, but the efficiency was very high. The single channel chips would deliver around 3.1GB/sec from PC3200 ram which is an efficiency of more than 90%. The Dual Channel parts that made use of the 940 socket were delivering above 5GB/sec. With tight 2-2-2-5 timings, 5.6~5.8GB/sec was possible provided you had enough clock speed. (2.4GHz+)

4. The data throughput of Athlon64's is squarely because of the on-die (CPU) data termination of the data by the Memory controller. The latencies are reduced as well purely because of proximity and because the controller is part of the CPU, the operating frequency is as high as the CPU Clock. Somethign not possible with Intel's Northbridge memory controller. After the Data gets to the controller, from there to the CPU it's going to go through many delays, in wait states and the like ultimately affecting usable bandwidth negatively. The low clock speed as well of the controller add to this as the NB is clocked at 266MHz (1066MHz Quad Pumped). Now compare this with an on-die controller where speeds are at the least 1.8GHz (not pumped in any way)

If you understood how a processor works you would know that manufacturing process isn't nearly as important as design where clock frequency was concerned. The Pentium 4 architecture uses a VERY deep pipeline in order to achieve those high frequencies which is why the C2D runs at far lower clock frequencies, because they chose (wisely) to move back to shorter pipelines.

It's a intricate process how it works but long pipeline present many problems and require heavily accurate branch prediction or else suffer from pipeline errors and thus flushes which result in severe performance hits (and efficiency drops) in order of magnitude because of the longer pipeline. Branch prediction currently can only be so accurate and thus presented a huge problem for the Pentium 4 architecture, and subsequently the long pipeline's where dropped.

1. Wow, that is a very bold statement. I will give you that. It's fun though...

Before any CPU is deigned or GPU ASIC is put on paper you must know what is the target process. That determines how dense your processor is, how fast it can run, how much it costs to manufacture and how much cooling is it going to need. The processor performance has to make the best out of all these situations. Within the given node, they must satisfy their targeted IPC.

Simply put on a 130nm process, you can't have 200million logic or register gates operating at anything above 1.4GHz or so. With that you will get massive heat and a very low yield on 200 or even 300mm wafers. On a 90nm process however (like the AMD X2's) you can put in 230million+ gates at high clock speeds (3GHz) or even more gates at a lower clock speed. However since it's easier to ramp up speed than get more wafer real estate, you minimize your die and scale the clocks. Now because as AMD or whoever you will want to scale up the clock speeds as high as you can, you need to refine your design so that each cycle gives you maximum performance. However you can't optimize to no end, because the more complex the design the more heat you generate processing anything even at low clock speeds. A branch unit that is inaccurate will cause re-issues and pipeline flushing which generates more heat and ultimately puts a ceiling on your clocks.

Now, shorter pipelines are not what makes the C2D its' part of it but that isn't even half of the story at all. I am unfortunately not knowledgeable about the core differences between the P4 and C2D to explain in length what the other differences are. Save to say the team that worked on P4 is not the same as the one that spawned the C2D which happens to be the same people that spawned the Pentium3...

It's a intricate process how it works but long pipeline present many problems and require heavily accurate branch prediction or else suffer from pipeline errors and thus flushes which result in severe performance hits (and efficiency drops) in order of magnitude because of the longer pipeline.

That is about the only thing you wrote that is remotely correct
However you are stuck on this pipeline issue as if its the key to CPU performance which it isn't. AMD have not altered pipeline stages in the K10 over the K8 its still 12, but the IPC has increased dramatically.
Neither you or I are fit to give this topic the proper debate it needs, but I do know that pipeline length is not the be all of processor performance....

Anyway in closing, slow your roll. The wool is not easily pulled over some

 

[DragonLogos]

DragonLogos

"What else, how about how Intel side stepped the whole 64 bit thing and dual core, even MS were left wondering how things were going to go forward addressing 3.5 gigs of RAM "

ShockG

" How is Vista in anyway, shape or form related to Intel? "



So please explain (albeit in your own words) how the Windows community were to go forward without AMD64

and before you reply, you might want to read this first (best bits at the bottom of the page)

http://en.wikipedia.org/wiki/AMD64

(not that it will make any difference)



ShockG " I don't know what Telkom has to do with Intel "

I do not think you are living under a stone, but maybe Google this, do a search on this site... or check it out on Yahoo


ShockG " it became apparent that 10GHz was not feasible unless something drastic took place that would change silicon/copper "

This is just part of the total rubbish, 10 gig was not feasible, and everyone knew it, heck for that matter, forget 5 gig... or even 4 gig... but the sales teams knew better, for they were just and horrible.... LOL

4 gig was not feasible (without super conductors and Johnson electronics) and Intel gave up on it, but all the Intel punters were looking for the up-grade path that would lead them to the holy Grail of the 10 Gig CPU - Vapourware, pure and simple, and under US law you can be done for this

 

[ShockG]

Are you and Gnome related?

you are aware that IBM has a gate that switches at 1THz right?
Are you also aware that Intel at no point ever made plans or put into any roadmap a 10GHz part.

As for the Vista thing, are you sure you know what a CPU is or what an operating system is? I think we should establish a common understanding of those before we go forward.

Lets assume quickly that you are a rational being.
I say

How is Vista in anyway, shape or form related to Intel?

you in all your glory say...

So please explain (albeit in your own words) how the Windows community were to go forward without AMD64

Am I missing something here? Are we talking about spirituality or something else?

 

[Ekhaatvensters]

rubbish

it will perform way better than an AMD system

on some games you wont notice other games you will

Well I mostly meant comparative to what you could have spent your money on. People buy a R2000 chip and run it with a R1500 card.. thats stupid.

 

[Gnome]

Are you and Gnome related?

No were not

Anyway just skimmed your reply real quick like but lets see:

Careful now you have to crawl before you attempt running...
AMD never manufactured CPUs for Intel at any point.

Perhaps a little history lesson is in order:

In February 1982, AMD signed a contract with Intel, becoming a licensed second-source manufacturer of 8086 and 8088 processors.

Source

How is that not making chips for Intel? *sigh*

MD amongst others which were perhaps before your day such NextGen, CyriX and Fairchild produced X86 clones. The CyriX parts going by the name of 4X86 and the like. Incidentally the highest clocked DX4 chip came from CyriX at 133MHz, followed by AMD's part at 120MHz and Intel's own DX4 75MHz and 100MHz chips.

I've been into it since the 386SX so it's not before my time but thanks , I can still remember them making Intel Clones which is why I said they only truly started making their own chips with the K5.

- Just a bit of history for you...

You're just full of use full information

1. Do not correct someone then turn around and make even more errors.
Majority of AM2 CPU's are 90nm just like 939 CPU's have been since Winchester in 2005. There was no node shift to AM2.

True, my mistake, forgot about that little piggy, they have a few cores and I overlooked the Winchester Core

3. The TDP of the 939 and AM2 parts is the same mainly 95W and 65W.

A little table provided to your free of charge

2. DDR voltage has nothing to do with the CPU. JEDEC made DDR2 reference voltage 1.8V compared to the 2.5 *later ratified to 2.6V* of DDR1.

Of course it does not have anything to do with the CPU (well apart from the Memory controller change), AM2 is a architecture and that is what I was referring to, I pointed out the DDR2 ram because it has bearing on the power usage of the architecture.

4. X2 3800+ like the others come in the EE version and the regular version. the 35WTDP and the other 65W models

I only used the one processor as an example of a CPU that runs cooler than the C2D, not sure what you're trying to say...

3. As for memory bandwidth, AMD had inherently low memory bandwidth efficiency with the AthlonXP in particular. With the introduction of the nForce chipset and Dual Channel memory controllers in 2001. The theoratical 6.4GB/sec rarely ever got above 3.21GB/sec. At the time the Pentium 4B and C were above the 4GB/sec mark. While both used DDR1.

I specifically said the Athlon USING DDR ram had more memory bandwidth than the PENTIUM3 perhaps my wording made it a bit confusing?
But it is true that initially the Pentium 4 was unable to compete with the AMD cpu as well as Pentium 3 cpu's of the time. Wikipedia Pentium 4.

4. The data throughput of Athlon64's is squarely because of the on-die (CPU) data termination of the data by the Memory controller. The latencies are reduced as well purely because of proximity and because the controller is part of the CPU, the operating frequency is as high as the CPU Clock. Somethign not possible with Intel's Northbridge memory controller. After the Data gets to the controller, from there to the CPU it's going to go through many delays, in wait states and the like ultimately affecting usable bandwidth negatively. The low clock speed as well of the controller add to this as the NB is clocked at 266MHz (1066MHz Quad Pumped). Now compare this with an on-die controller where speeds are at the least 1.8GHz (not pumped in any way)

I realized I must have made my statement more clear, the AM2 easily outperforms the C2D in terms of memory bandwidth on similar memory clock frequencies. Both theoretically and in practice, and tomshardware had article where they pushed both to the limits. AM2 came out ahead, I'll post the article if you wish?

1. Wow, that is a very bold statement. I will give you that. It's fun though...

Why thank you

Now, shorter pipelines are not what makes the C2D its' part of it but that isn't even half of the story at all. I am unfortunately not knowledgeable about the core differences between the P4 and C2D to explain in length what the other differences are. Save to say the team that worked on P4 is not the same as the one that spawned the C2D which happens to be the same people that spawned the Pentium3...

Not at all what I was implying I simply pointed out that they realized that long pipelines are at this day and age not at all feasible. Further they made other improvements which anyone interested can easily find on the web. BUT the shorter pipeline definitely made a big difference in efficiency. I'll find the article where the architecture is explored if you wish...

That is about the only thing you wrote that is remotely correct

LOL

However you are stuck on this pipeline issue as if its the key to CPU performance which it isn't. AMD have not altered pipeline stages in the K10 over the K8 its still 12, but the IPC has increased dramatically.
Neither you or I are fit to give this topic the proper debate it needs, but I do know that pipeline length is not the be all of processor performance....

Anyway in closing, slow your roll. The wool is not easily pulled over some

In fact it is a very important issue in making high clock frequency achievable, the reason the newer AMD's are able to achieve such high clock rates (and C2D) is because of architecture enhancements as well as lower process BUT remember the Intel P4 roadmap was set to achieve a 10Ghz CPU! Which is not at all possible with the shorter Pipeline. Thus the long pipeline made quite a difference in helping the P4 achieve such high clock rates, at least initially.

EDIT:
Sorry never read your entire post

Are you also aware that Intel at no point ever made plans or put into any roadmap a 10GHz part.

Curious about our overclocking successes, we asked Intel why Core 2 CPUs are able to overclock close to the same levels as NetBurst processors can, despite having less than half the pipeline length. Intel gave us the following explanation:

NetBurst microarchitecture is constrained by physical power / thermal limitations long before the constraint of pipeline stages comes into play. The microarchitecture itself would continue to scale upwards if not for the power constraints. (In fact, we have seen Presler overclocked to 6 GHz in liquid nitrogen environments. At that level, power delivery through the power supply & board itself begin to limit further scaling of the processor.)

Intel's explanation makes a great deal of sense, especially when you remember the original claims that NetBurst was supposed to be good for between 5GHz - 10GHz. NetBurst never got the chance to reach its true overclocking prime as Intel hit thermal density walls well before the 5GHz - 10GHz range and thus Intel's Core architecture was born. Intel's Core 2 processors once again give us an example of the good ol' days of Intel overclocking, where moving to a smaller manufacturing process meant we'd have some highly overclockable chips on our hands. With NetBurst dead and buried, the golden age of overclocking is back.

Source

 

[Ekhaatvensters]

All makes an interesting read. Not sure who to believe though

Keeping battling it out

 

[Abe]

No were not

Don't you mean we're

Source

How is that not making chips for Intel? *sigh*

Although this case may or may not be correct. I would be a bit careful quoting Wikipedia.

I've been into it since the 386SX so it's not before my time but thanks , I can still remember them making Intel Clones which is why I said they only truly started making their own chips with the K5.

Wasn't it the 386DX40? I seem to remember that CPU making a big splash. It's been a long time but I also remember that was what one of the Intel/AMD suits was about. AMD settled and pay Intel some royalties for every chip (something like that). The crappy thing is that because of the agreement, Intel were able to use the AMD64 instructions without any royalties.

Cheers

Abe

 

[The_Assimilator]

You guys pulling up the "10GHz Intel CPUs" thing need to get a reality check. Intel said that they envisioned the NetBurst architecture being able to scale to 10GHz, but that's all they said - no promises about 10GHz CPUs were ever made.

As for AMD regaining the performance crown - I don't think it's gonna happen. Intel is scheduled to roll out their updated Core2 chips around April, as well as more quad-cores, and they are planning to move to a 45nm process near the end of the year - while AMD has only just managed to get to 65nm.

I realized I must have made my statement more clear, the AM2 easily outperforms the C2D in terms of memory bandwidth on similar memory clock frequencies. Both theoretically and in practice, and tomshardware had article where they pushed both to the limits. AM2 came out ahead, I'll post the article if you wish?

It doesn't matter if the AM2 Athlon outperforms the Core2 in memory bandwidth, because memory bandwidth isn't a particularly important factor in computer performance nowadays. The Core 2 Duos may have lower bandwidth but they are better in other, more important areas of performance (multi-threading etc.).

If Intel do ever decide to integrate the memory controller onto the CPU, I'm quite confident that the resulting chip will blow AMD's offerings out of the water.

 

[Gnome]

You guys pulling up the "10GHz Intel CPUs" thing need to get a reality check. Intel said that they envisioned the NetBurst architecture being able to scale to 10GHz, but that's all they said - no promises about 10GHz CPUs were ever made.

The road map is used a company MO, you can easily see it on the Intel web-site and it is a roadmap of where Intel is heading, therefore the word Processor Road Map.

At the launch of the P4, Intel stated NetBurst was expected to scale to 10 GHz (over several fabrication process generations.)

Source
There are quite a few sources that confirm that Intel did indeed aim for 10Ghz, how many people need to post it before you believe it?

As for AMD regaining the performance crown - I don't think it's gonna happen. Intel is scheduled to roll out their updated Core2 chips around April, as well as more quad-cores, and they are planning to move to a 45nm process near the end of the year - while AMD has only just managed to get to 65nm.

Intel will probably dominate for a while now, just as they did before the Athlon64 launch. It's the same story as Nvdia vs. AMD (formerly ATI), first the one then the other... But only time will tell so don't count the chickens before they hatch

It doesn't matter if the AM2 Athlon outperforms the Core2 in memory bandwidth, because memory bandwidth isn't a particularly important factor in computer performance nowadays. The Core 2 Duos may have lower bandwidth but they are better in other, more important areas of performance (multi-threading etc.).

The reason I stated the memory performance was because of:

a) Their memory addressing was never a problem AMD used off-die controller since the company started and only changed to internal controller with Athlon64 in 2003. Even then the memory bandwidth efficiency sucked and only with dual channel controller did the benefits start to show when using DDR1.

I was simply pointing out that their memory controllers/memory performance doesn't suck. But I see now ShockG was talking about efficiency...