VHDL help needed please..

[ravingDIODE]

I'm looking for help with a basic vhdl project where we have to build a basic UART.

Code and all is fine and compiles and flashes to the Cyclone 3 FPGA chip but not functioning as supposed to..

If anyone here understands vhdl and would not mind helping me, please PM me or email me at [email protected].

All our lecturers and demi's are busy so im desperate now to get this working, project due thursday.

I just need someone to have a glance at it and see if there are any logical errors or such..

Thanks in advance,
rD

 

[sn3rd]

Code is fine, but it doesn't work?

Haha, sorry dude... Not a helpful post here. It's just funny how many times I hear that.

Anyway for the helpful part, hook up an oscilloscope and check all your timings. That stuff can be a bugger. And when you say that it isn't working, year aspect isn't working? Does it not run at all? Completely dead? That information is very valuable.

I'm looking for help with a basic vhdl project where we have to build a basic UART.

Code and all is fine and compiles and flashes to the Cyclone 3 FPGA chip but not functioning as supposed to..

If anyone here understands vhdl and would not mind helping me, please PM me or email me at [email protected].

All our lecturers and demi's are busy so im desperate now to get this working, project due thursday.

I just need someone to have a glance at it and see if there are any logical errors or such..

Thanks in advance,
rD

 

[ravingDIODE]

The board goes on, and the transmitter is fine according to simulation but i think the timings are off on the receiver but we cannot find fault..the receiver has to sample in the input 16 times faster to ensure it inputs the correct data. The non-functioning part is the output on the led's on the board where the receiver outputs the data it received, but that is wrong, so the receiver is either sampling the input data incorrectly or just not working properly as the led's light up in certain order which does not resemble the bits transmitted, and the stop error led comes on every time indicating that it did not detect the stop bit to indicate the end of the transmission..if you have the time and/or understanding to quickly glance over my code it might just help, it is not a lot..just some vhdl files which are probably 2pg max..

It runs, but the output is wrong..